The present invention relates to a low inductance superconductive integrated circuit and a method of fabricating the same, and in particular to a niobium nitride (NbN) based superconductive integrated circuit with reduced circuit inductances.
At the present time, there are two major types of superconductive integrated circuits, one of which uses niobium (Nb) and the other uses niobium nitride (NbN). Nb-based superconductive integrated circuits generally have low parasitic circuit inductances, and are therefore suitable for high-speed and high-frequency operations. However, a disadvantage of the Nb-based superconductive integrated circuits is that the temperature required for the operation of such circuits is close to 4 K, which necessitates the use of liquid helium. Liquid helium requires complicated and expensive refrigerating systems. On the other hand, NbN-based superconductive integrated circuits have been developed for operation at temperatures above the liquid helium temperature. NbN-based circuits can operate at a temperature of 10 K or higher, which can be achieved and maintained by a relatively simple closed-cycle refrigerator.
However, typical thin films of NbN used in the fabrication of superconductive integrated circuits exhibit relatively large penetration depth in the range of about 250-350 nm. A large penetration depth gives rise to high parasitic inductances in the NbN-based superconductive integrated circuit which degrades circuit speed and performance. Conventional NbN-based integrated circuits generally have slower operational speeds than those of Nb-based integrated circuits.
Another disadvantage of conventional NbN-based superconductive integrated circuits is that their circuit densities are generally low. A typical NbN process has only a low value resistor with a sheet resistance in the range of about 0.5-2 ohms/square. In the conventional process, the low value resistor can only be connected to the circuit through a second level metal. There are two disadvantages associated with this arrangement. First, the second level metal has an undesirable parasitic inductance which reduces the circuit speed. Second, because of the low sheet resistance, a large circuit resistance requires a large number of squares which consume a significant amount of the circuit's surface area, thereby decreasing the circuit density.
Therefore, there is a need for a NbN-based superconductive integrated circuit that has low parasitic circuit inductances to enable high-speed operations. Furthermore, there is a need for increasing the circuit density to reduce circuit area so that larger scale integration can be achieved.